Bill Gervasi

Mr. Gervasi has over 48 years of experience in high speed memory subsystem definition, design, and product development. He is Principal Systems Architect for Wolley, developing CXL based memory solutions. Mr. Gervasi has been involved in the definition of Double Data Rate SDRAM since its earliest inception. He has served on the JEDEC Board of Directors and chaired committees for DRAM parametrics and memory modules during the development of DDR1 through DDR6, and authored the Automotive SSD standard. He is currently the chairman of the JEDEC Alternative Memory committee. He received the JEDEC Technical Excellence award, their highest honor, in 2020.